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Digital Thread Gap Analysis: 14 Semantic Mismatches Between SysML v2 and PLM Standards

Image courtesy of omg.org

Systems ArchitectureSource: omg.orgApril 3, 2026

Digital Thread Gap Analysis: 14 Semantic Mismatches Between SysML v2 and PLM Standards

A joint INCOSE/OMG/PDES working group identifies 14 integration points where SysML v2 and PLM schema standards have semantic mismatches causing data loss. Proposed resolutions include the SysIML OMG profile and STEP AP242 Module 1650.

Working Group Scope

The Digital Thread Interoperability Working Group was established in 2025 to address data loss and semantic mismatch at the boundaries between MBSE tools (SysML v2) and PLM/ERP systems (STEP AP242, PLCS, AP239).

The 14 Mismatches

1. Configuration management alignment (4 gaps): SysML v2 version semantics differ from AP242 effectivity structures 2. Interface definition (3 gaps): PortDefinition does not map to AP242 connector schemas 3. Allocation and partitioning (4 gaps): Function-to-physical allocation lacks canonical representation 4. Verification evidence (3 gaps): V&V evidence structures have no direct AP242 equivalent

Proposed Resolution

The OMG SysIML profile combined with a new STEP AP242 Module 1650 specifically targeting the MBSE–PLM boundary.

Read the original article at omg.org.