Computing and ML systems news

Intel and ASML have transitioned 0.55 NA High-NA EUV lithography into high-volume manufacturing, dual-qualifying critical layers on 18A-based Panther Lake notebook processors. While the technology reduces multi-patterning steps and defects, it introduces anamorphic lens stitching challenges and a 2.5x exposure cost premium over conventional 0.33 NA systems.

An independent analytical project index ranks approximately 20,000 IKEA products using a deterministic formula to calculate structural complexity and estimated build times. The framework leverages instruction step counts, part quantities, and empirical user reports to establish standardized difficulty metrics.

Systems developer Geir Isene has engineered "Frame," a functional X11 display server written entirely in Assembly without library dependencies. Running as part of a custom 100,000-line Assembly desktop environment, Frame successfully hosts complex applications like Firefox and GIMP while reducing idle CPU consumption compared to traditional Xorg.

The Roc compiler team has completed a 487-day scratch rewrite of its codebase from Rust to Zig, reaching feature parity. The architectural transition resolves fundamental compiler-phase bugs in the language's specialization pipeline while enabling zero-allocation pattern matching and automatic hot code loading.

A technical breakdown of porting Google's Gemma 4 26B MoE model to a dual Intel Xeon E5-2690 v2 platform without AVX2/FMA3 support. By patching ik_llama.cpp to bypass missing vectorized fused kernels, the system achieves 5.2 tokens/second at Q8_0 precision.

Real-world latency testing using a custom RP2040-based photodiode measurement rig reveals that native Wayland introduces less than 0.25 ms of input lag compared to X11. However, running games through XWayland adds a massive 3.13 ms penalty, while variable refresh rate implementations significantly stabilize frame pacing.

Porting CUDA workloads to non-Nvidia hardware requires navigating deep architectural differences in instruction sets, memory models, and runtime APIs. Systems engineers must evaluate the trade-offs between source-to-source translation, intermediate representation compilation, and runtime API emulation.

The `linux-0.11-rs` project delivers a modern, type-safe rewrite of the 1991 Linux 0.11 kernel, complete with demand paging, CoW fork, a Minix v1 filesystem, and a self-hosted userland. The architecture features an alternative standard library mimicking the Rust `std` API alongside over 80 core utilities and a custom POSIX-subset shell.

Ship That Code is an interactive educational platform by Echoed Labs LLC featuring over 80 courses focused on rebuilding core systems infrastructure from scratch. The curriculum guides engineers through the low-level implementation of database engines, container runtimes, and distributed protocols across nine programming languages.

Zig Software Foundation president Andrew Kelley has detailed the systemic technical debt, organizational friction, and code quality issues that preceded Bun's transition to Rust. Kelley argues that Bun's engineering shortcomings were rooted in a lack of development discipline rather than inherent limitations of the Zig language.

pgrust, an open-source rewrite of PostgreSQL in Rust, has successfully passed the complete Postgres regression suite of over 46,000 queries. The system achieves direct disk compatibility with Postgres 18.3, allowing it to boot from existing data directories while preparing a foundation for major internal architectural experiments.

Bun is transitioning its 535,496-line codebase from Zig to Rust to eliminate persistent use-after-free and memory leak vulnerabilities. The architectural move addresses safety limitations when interfacing manual memory management with the garbage-collected JavaScriptCore engine.

CVE-2026-43499 is a stack-based use-after-free vulnerability affecting the Linux kernel's rtmutex subsystem since version 2.6.39. The bug stems from an incorrect task reference cleanup during proxy lock rollback, allowing local unprivileged users to leave a dangling pointer on a thread's kernel stack.

Video game publishers are increasingly requiring closed-source Ring-0 drivers and hardware attestation to combat cheating, introducing severe security risks and geopolitical data exposure. Despite these escalating system privileges, the cheat ecosystem has transitioned to out-of-band hardware bypasses, rendering kernel-mode monitoring highly invasive yet structurally ineffective.

AMD has introduced a dedicated hardware developer kit priced at $4,000 based on the Ryzen AI Halo architecture. The platform is designed to provide systems engineers with a standardized environment for local hardware validation and low-level software optimization.

The paradigm of "Right to Local Intelligence" outlines a fundamental shift toward decentralized, on-device compute sovereignty. By prioritizing local execution over cloud-dependent APIs, systems engineers must re-evaluate hardware constraints, latency profiles, and data privacy boundaries.

Since the release of Linux kernel version 6.9, the LUKS suspend process has ceased wiping disk-encryption keys from system memory. This regression, identified during an investigation by researcher Ingo Blechschmidt, leaves sensitive cryptographic material resident in RAM.

Databricks has introduced Lakebase, a serverless Postgres architecture that externalizes the write-ahead log and data files into independent cloud services called SafeKeeper and PageServer. By materializing transactional data into open columnar formats on cloud storage, Lakebase enables a Lakehouse Transactional Analytical Platform (LTAP) model where analytics engines and Postgres read from a single data copy without CDC pipelines.

The Asahi Linux 7.1 progress report details critical hotfixes for APFS boot picker and SMC battery driver regressions introduced in recent macOS betas. It also highlights major driver enablement on M3 SoCs and a novel custom-firmware approach for the Apple Video Decoder.

Zig has overhauled its LLVM backend to store arbitrary bit-width integers as ABI-sized types in memory, driving a logical redefinition of the `@bitCast` builtin. Concurrently, the SPIR-V backend has transitioned to multi-threaded codegen, introduced a native `@SpirvType` builtin, and integrated calling-convention-driven execution modes.